1. Field of the Invention
The present invention relates to a method for fabricating a stack capacitor of a semiconductor device, and more particularly to a method for fabricating a stack capacitor to be used for a highly integrated semiconductor device by using simple process steps.
2. Description of the Prior Art
Generally, a high integration of dynamic random access memories (DRAMs), which are a kind of semiconductor memory device, involves inevitably a reduction in the area of a cell and thereby a limitation on obtaining a sufficient capacitance. In order to solve problems caused by such a reduction in the unit area of a cell inevitably involved to achieve high integration of integrated semiconductor circuits, efforts have been made to develop sophisticated process techniques and to ensure the reliability of devices and a sufficient capacitance of a cell.
As a part of such efforts, there have been proposed a method of increasing an efficient area of a capacitor and a method of using a high dielectric thin film. The development of high dielectric thin films has not reached the level for the high dielectric thin films to be applied to semiconductor devices. In this regard, research for obtaining a capacitance of a desired level or greater at a small area is being actively made.
For example, there have been proposed a three-dimensional structure of capacitor such as pin structure, cylinder structure and stack structure. However, such a three-dimensional capacitor structure requires use of more complex process steps for obtaining more increased capacitance. Moreover, this structure involves an increase in the height of a capacitor, thereby resulting in a problem with the topology at a subsequent metal wiring forming step.